|
Certain details of the internal operation of the central processor are determined by mode settings. These internal operating modes, which are determined seperately for each program member, fall into three categories: address mode, branch mode and zero supression mode. Address Mode The 12-bit N-field of a non-branch instruction permits the direct addressing of any location up to location 4095 of the program. If a location higher than 4095 is to be addressed, then modification must be used to extend the effective addressing-range of the instruction. Some processors in the 1900 series cannot have a core store greater in size than 32,768 words, and with such processors a 15-bit modifier is sufficient to enable an instruction to address any location in the store. On the larger central processors that need to address data locations above 32,767, and therefore require a modifier of more than 15-bits, a choice of address modes is provided so that larger processors are capable of running programs written to run also in the smaller machines. Compact Mode (15-bit Address Mode) In compact mode, all modified addresses in non-branch instructions are truncated to 15 bits; hence a synonym for compact mode is 15-bit address mode, and the standard abbreviation for this mode is 15AM. A compact mode program would normally, but need not necessarily, be in direct branch mode. If such a program is not in direct branch mode, it will run successfully only in processors which are capable of driving a store greater in size than 32,768 words and with a suitable EXECutive. A program must be able to operate in compact mode if it is to run successfully in central processors with a maximum storage capability of 32,768 words or less. Extended Data Mode (22-bit Address Mode) Extended data mode is only available on processors which are capable of driving a store greater in size than 32,768 words and on which a suitable EXECutive is provided. In extended data mode all modified addresses are truncated to 22 bits; hence the synonym for extended data mode is 22-bit address mode, and the standard abbreviation for this mode is 22AM. Certain instructions (branch/count) operate differently in extended data mode. There are certain additional instuctions (BCT, MVCH, SMO and BFP) which are available only on 1902A and 1903A processors and on processors with extended data mode facilities; these instructions may be used on the latter group of processors in compact mode or in extended data mode, and on the 1902A and 1903A in compact mode only. Branch Mode The 15-bit N-field of a branch instruction permits a program to branch directly to any program location up to 32,767. With the larger central processors this 15-bit limitation would restrict programming instructions to the first 32,768 words of the program area, were means not provided to permit branching to a wider range of program addresses, thus enabling full advantage to be taken of the greater storage capabilities of these machines. The supplementary modification facility (SMO instruction) is one method of achieving this; another method, in central processors with a storage capability greater than 32,768 words, is the provision of different modes of operation for branch instructions. A choice of branch modes is also provided so that larger processors are capable of running programs written to run also in the smaller machines. Direct Branch Mode When a program member is operating in direct branch mode, the destination address of a branch instruction (i.e. the location to which control will be transfered if the branch takes place) is specified by the 15 bits of the N-field, modified if applicable by a supplementary modifier, The modification by a supplementary modifier only applies if
Note that if supplementary modification is employed in direct branch mode, the modified destination address will extend over 15 or 22 bits, according to whether the program member is operating in compact mode or in extended mode. The standard abbreviation for direct branch mode is DBM. Extended Branch Mode Extended branch mode introduces two further types of branches: relative branches and replaced branches. Bit 9 of the instruction is used to indicate the type of branch, thus leaving a 14-bit N-field. If B9 is zero then the instruction is a relative branch; if B9 is one, then the instruction is a replaced branch. Relative Branches branch to a destination address which determined relative to the location holding the branch instruction itself. The 14 bits of the N-field are first extended to 22 bits by propagating the value of the most significant bit; the 22-bit number is then added to the address of the location containing the branch instruction, and the sum is truncated to 22 bits to give the destination address. The N-field is thus treated as containing a signed relative address permitting forward or backward branching; the extension to 22 bits ensures correct subtraction effects when N is negative. With replaced branches, the N-field contains the address of a location which contains the destination address in its least significant 22 bits. The location which contains the destination address is called the 'replacer', since in effect its contents 'replace' the N-field of the instruction; the technique is alternatively known as indirect addressing. Supplementary modification: Both relative and replaced branches may be subjected to supplementary modification. In each case, the supplementary modifier is added to the destination address determined as described above, and the result is truncated to 22 bits to give the modified destination address. If the program member is working in compact mode, the supllementary modifier is first extended from 15 bits to 22 bits by propagating the value of the most significant bit, so as to preserve any negative modification effect. The standard abbreviation for extended branch mode is EBM. Zero Supression Mode Zero Supression Mode is relevant when a CBD instruction is used to convert a binary number to a string of decimal characters. The mode may be set to 0 or 1 by a MODE instruction. If the mode is set to 1 then, when a CBD instruction is given, zero suppression occurs, i.e. leading zeroes are replaced by space characters. If the mode is set to 0 there is no zero suppression. |