ICL 1900 Series Preservation
PF56 Emulator
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Preservation
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Introduction The PF56 was used in the role of an intelligent controller, both as a Communications Controller (as the 7903) and as a disc controller (2812 - ED30, ED60 & ED200). Confusingly also known as GPC (General Purpose Controller), this machine was a computer in its own right, albeit as a dedicated controller with an instruction set tailored to that job. The PF56 was almost exclusively used on the larger 1900 series machines (1904E/A/S or 1906A/S). Its use as the 2812 disc controller was however supported on some early members of the 2900 series machine to permit access to existing disc media. A clarification There has been some confusion regarding the name GPC. The PF56 was known, according to the design team, as the PF56 and the use of the term GPC on its documentation has been a surprise to everyone we have been in contact with regarding the PF56. - Several of the PF56 design team members subsequently worked on the 2900 device known as the GPC, and let's face it, they know. Whilst the two devices shared a common design team, and some concepts may appear in common to both, the two designs were separate and with completely different goals. The PF56 employed a rather limited set of TTL and core store, the 2900 GPC used MSI TTL and semiconductor memory. Hardware The machine was designed at ICL's Stevenage facility between the late 1960's and early 1970's from the dates on some documents that we have. Using some of the same card sets used by other Stevenage 1900 series machines (6000-Series boards?), and employed a similar range of small-scale integration TTL logic chips. The hardware design re-used some components from the 1900 series machine of the time - the operators' console was extremely similar to the one on the 1901A/1902A/1903A machines, and the power supplies used the same regulators as the 1904A. This 16 bit byte-addressed, word oriented machine had 8,16,24 or 32KW of store and had 15 accumulator registers and a deceptively small instruction set, but when the various instruction modes were combined it was a powerful and, in my opinion, an elegant and extremely well thought out machine. I find some of the code sequences in the DCPs are clear, clean and are a rather eloquent testimonial to ICL's coding standards and the professional standards of a presumably small team of coders. I would really like to see the original sources for these sections of code. Software As the device was intelligent it required some operating system software to make it useful, this was known as a DCP (Dedicated Control Program). This program was loaded into the machine by various means:
Available Software We have a small collection of software for the PF56, making the emulation useful.
Utility Software #SPAA - 1900 based cross-assembler for the PF56 instruction set. This program has been re-keyed from a listing and modified to rununder GEORGE 3 rather than the original Stevenage Operating System (SOS) which is only referred to in the documentation for #SPAA. Does anyone know anything about the SOS operating system? Diagnostics and Utility Programs We are rather fortunate that we have copies (as assembly listings) of a number of the original diagnostic programs for the PF56. These diagnostics when rekeyed were useful to check the operation of the re-keyed #SPAA and then to validate the correct operation of the PF56 emulator itself. The diagnostics that we have include:
The above files include both the assembly listing (.txt) and the source (.spaa) file, which is a paper tape image file, so not directly editable by most Windows(tm) editors. I used the excellent Notepad++ to re-create the sources. Recently we obtained a 9 track magnetic tape with a set of PF56 programs for the 2812 line of disc controllers. It includes:-
Utility Programs We have the following PF56 test and diagnostic programs, originally on paper tape, but found on a 1900 format engineers' magnetic tape. Here they were held in a small 1900 program which when run would punch a paper tape. We have been able to run a number of these on the emulator, but the absence of any documentation as to how this was meant to be done has made this a rather hit and miss business.
* Appears to be a test OS, allowing other programs to be loaded and use routines and services in SA00QA0A Any information regarding this would be greatly appreciated. Documentation We have a limited but extremely useful set of documents for this machine which have been provided as a result of some considerable effort by various contributors. These documents define the machine architecture and instruction set. On several occasions during the creation and testing of the emulator I have found that these manuals assume a knowledge of the machine that is not in the available documentation. This is maybe to be expected as the PF56 was a closed box, which was never intended to be accessible by anyone outside of the PF56 and DCP groups within ICL. As a result the documents were likely not subject to the same completeness and QA procedures that the customer-facing 1900 series manuals were. That said, they are quite complete, with most apparent cases of omissions or inaccuracy eventually being revealed to be my more modern assumptions both of machine related matters and of the style of the English used in writing the manuals. So far I can only point at one instruction behaviour which is not in the available documents. See 1900 Series Controllers for the PF56 documents. Screen shot of PF56 emulator configured as a 2812 Disc Controller This screenshot shows the now working disc bootstrap sequence and the loading of an OLT program from paper tape.
A copy of a post-mortem from the EZDB DCP EZDB-PM is available. Screen shot of PF56 emulator configured as a 7903 Communications Controller It reads the 7903 terminal specification from the paper tape reader (switch 15 on) and becomes ready.
Current Status 14-Jan-2017 Little visible progress on the emulator, have been investigating the 7930 scanner and the MCIU and a partial implementation now exists. This allows the EZ5A DCP to initialise and if 7020 RJE terminals or 7181 Remote Video Terminals are configured, the DCP polls can been seen being sent to the relevant lines and addresses. 5-Oct-2016 The last couple of months have advanced the emulator somewhat: CPU A number of bugfixes has resulted in the ability to load PF56 binary format paper tapes using the SA00XLDA binary loader program via the integrated reader. - Whilst this is a clear improvement, the reader logic is still not right. The SA00QA0A diagnostic accesses it but is looping looking for something. - This program appears to be some form of diagnostic monitor, under which a number of the other tests are run. The console logic has also undergone some more changes as a result of trying to run SA00QA0A. Is is now possible to respond to its request for the store size. However the program become unresponsive after this. Recently a cache of PF56 related programs was found on a 9-track magnetic tape that was recovered. This has provided a full set of ED30 and ED60 DCPs, the standard set of OLTs and a number of other PF56 diagnostic programs. Attempting to run some of these resulted in the changes to the console and paper tape reader mentioned above. MEDS The documents received regarding the 4420 MEDS Application Module have proved, yet again, to be useful. - We now have the ability to bootstrap the PF56 via the MEDS module. and subsequently load a selected DCP. This task involved some time reverse-engineering and documenting the #SS33 and #DCPD utility programs that were used to maintain the ICLKHARDFILE on the boot disc. 27-Jun-2016 The problem with reading paper tape in character mode has been resolved. I have been able to load an original specification tape for a large 7903 configuration. This greatly simplifies and speeds up the process of starting up the 7903 emulator with a known configuration. The activates that are used to configure the attached scanners are seen and can be understood from the corresponding specification. - Now comes the job of getting the MCIU and Scanners working. Whether or not I decide to get the 7930 scanner working with the 1904S emulator or with the PF56 is still an open question. 21-Mar-2016 Thanks to a treasure trove of documents from several sources, for which many thanks, the EDS Module has been improved significantly and can now be used to bootstrap load the 2812. This information will take a while to fully digest, but even in a few weeks it hasallowed significant improvements in the emulation of the PF56 in its 2812 rôle. 11-Aug-2015 PF56 Passes all available hardware diagnostics and all DCPs will load and initialise. The EDS Module emulation code is partially working and permits the loading and execution of a limited number of the OLTs. The MCIU and scanner emulation logic has been started, but needs work both regarding understanding and implementation. Problems: (Can anyone help?) Paper tape reader I have managed to make the emulated hardware actions acceptable to EZDB as regards to loading OLTs from paper tape, where the binary mode is used. However I cannot get the single-character mode to work and therefore cannot load a DCP specification from the reader. The Technical Description (1111480) mentions two status bits but nowhere describes their significance. Console Again there are some nasty problems with status and interrupt timing. I have had to add some 'fiddles' to the emulator to make the console usable under the two DCP types. This was obviously not the case with the real hardware. DDE/IPM As this I/O module must, by definition, interface with both the PF56 store/CPU and the Standard Interface of the parent 1900 processor, there are a number of timing and status matters that are proving slow to understand and resolve. Documents We, as always, are eager to obtain any material relevant to the PF56, manuals, logic diagrams, specifications, paper tape images, anything. I am happy to scan and return any such materials, and only if a donor permits will the materials be made available on this or any other website (with or without attribution at the donor's request). Implementation Method The PF56 emulator has had a chequered history: Some years ago I attempted to code one using the approach used on our 1904S emulator, where each instruction's overall effect was mimicked. This met with rather limited success due to my lack of familiarity with the PF56 instruction set. Whilst I managed to get it to pass the first two hardware diagnostic tests, further progress stalled due to my failure to grasp the necessary details of some instructions and especially the interrupt mechanism. The PF56 emulation project lay neglected until early in 2015 when I was re-reading some documents and realised that the Technical Description document was in effect documenting the actions of the underlying CPU microcode in some detail. After creating some Excel spreadsheets showing the correspondence of the hardware's steps and the instruction flows for each order and some small test code fragments that mimicked the actions of the MILL and the associated flags I thought that I would attempt to create a'hardware register' level emulation. This resulted, to my surprise, in an emulator that in a short time was not only passing some simple tests, but also passing most of the available ICL's original diagnostics. Aspects of the instruction set that I found opaquely documented (e.g. repeat mode) actually 'just worked'. The result is an emulator that is quite faithful to the original in that the original register and highway architecture is retained, and this also permits the user interface to work in a manner that is similar to the original machine, including the ability to display register and other module information on the 'lights' as well as the implementation of single-instruction and single-step engineers' modes. It also resulted in the rather strange outcome for an emulator where a diagnostic program's comment reference to 'S11S L060 T,D1BC' meant that I had to look at my 'Step 1' code and in particular whether I had correctly set the 'C' binary. Even ICL's diagnostic program's comments were useful! I can say with some confidence that there will be some instruction faults to be found, but the basic CPU appears to run both diagnostics and DCPs and the only known problems are the expected ones of very incomplete peripheral controllers. Speed was a problem, with the machine running considerably slower than a real PF56, but now, having tidied the emulator and removed some very high amounts of debug trace output the average instruction time is approximately 1.26µS - at least twice the speed of the original. Errors and Omissions Whilst I have checked the contents of this page as much as I can for factual accuracy, I'm sure that there are many items omitted and any number of errors: please feel free to send us any corrections or clarifications. Page last updated: 28-Mar-2017 |
